资格

• 应征条件

  <MUST>
  - Bachelor degree or equivalent in Computer Science, Electronic & Telecommunication, Automation Control, Mechatronics, Information Technology or related fields.
  - English: At least Intermediate level (Prefer Toeic 650+)
  - At least 3 years’ working experience in LSI development.
  - Proven experience in LSI design and verification, working with RTL design, functional verification, and verification methodologies.
  - Proficiency in hardware description languages (HDLs) such as Verilog/ System Verilog/ VHDL.
  - Familiarity with industry-standard EDA tools for LSI design and verification, such as Cadence(NCSim), Synopsys (VCS/DVE/Verdi), or Mentor Graphics.
  - Knowledge of scripting languages (e.g., Python, Perl, Shell scripting) for automation and validation tasks.
  - Have basic working experience on Linux environment.
  
  {PREFER}
  - Having Japanese skill will be advantage.

• 英文

  Intermediate Level

• 其他语言

  None